Source-backed explainer
NVLink is NVIDIA's scale-up interconnect for moving data between GPUs and CPUs at much higher bandwidth than ordinary server PCIe paths. If you are reading product briefs full of NVSwitch, NVL72, and GPU bandwidth claims, this page is the fast way to make sense of them.
Overview
Most confusion comes from mixing up direct GPU links, rack-scale switching, and chip-to-chip variants. The product names change by generation, but the logic stays consistent.
NVIDIA's March 6, 2023 explainer describes NVLink as a high-speed interconnect for GPUs and CPUs, with fourth-generation bandwidth reaching 900 GB/s. The point is not generic I/O. The point is moving model state and collective traffic fast enough that multiple accelerators can behave like one coherent system.
Direct neighbor links are not enough once you scale beyond a small local island. NVIDIA's current NVLink page frames NVSwitch as the element that keeps the fabric all-to-all, letting larger systems retain full-bandwidth GPU-to-GPU paths.
Blackwell-era systems also use NVLink chip-to-chip inside superchips. NVIDIA's March 18, 2024 Blackwell announcement says the GB200 Grace Blackwell Superchip connects two B200 GPUs to Grace with a 900 GB/s ultra-low-power NVLink C2C interconnect.
Why not stop at PCIe?
PCIe is the general-purpose server interconnect. NVLink exists because tightly coupled AI and HPC workloads keep hitting communication walls before they hit raw compute walls.
Official delta
That comparison comes directly from NVIDIA's March 6, 2023 blog post. Later generations push the gap wider as models become more communication-heavy.
Timeline
The important thing is not memorizing every product codename. It is seeing how quickly interconnect bandwidth has moved from hundreds of gigabytes per second to multiple terabytes per second per GPU.
NVIDIA says NVLink was first introduced as a GPU interconnect with the NVIDIA P100 GPU.
Third-generation NVLink doubled max bandwidth per GPU to 600 GB/s, according to NVIDIA's 2023 explainer.
Fourth-generation NVLink reached 900 GB/s per GPU and became the baseline reference for modern DGX and HGX systems.
NVIDIA's Blackwell launch says fifth-generation NVLink delivers 1.8 TB/s per GPU and supports communication among up to 576 GPUs.
NVIDIA's current NVLink page describes sixth-generation NVLink at 3.6 TB/s per GPU, with a 72-GPU NVL72 system reaching 260 TB/s total aggregate bandwidth.
Use cases
If GPUs work independently, PCIe can be fine. If every step needs fast exchanges of activations, gradients, KV cache, or model shards, interconnect quality starts deciding the result.
Large training jobs need fast all-reduce and high-volume traffic between accelerators. That is why NVIDIA pairs NVLink with NVSwitch in DGX, HGX, and NVL systems.
NVIDIA's Rubin page explicitly ties sixth-generation NVLink to reasoning workloads and mixture-of-experts patterns, where tokens and experts can force heavy all-to-all communication.
NVLink-C2C extends the same logic inside package-level systems such as Grace Hopper and Grace Blackwell, where CPU and GPU need very high local bandwidth.
Single-GPU inference, embarrassingly parallel batches, small fine-tunes, and lightly coupled serving stacks often do not need the cost or system design complexity of NVLink.
Practical reading guide
FAQ
It is NVIDIA's high-bandwidth scale-up interconnect for GPUs and CPUs in accelerated systems.
No. NVLink is the link technology. NVSwitch is the switch fabric that expands those links into a larger all-to-all domain.
PCIe is the default server interconnect. NVLink is specialized for multi-GPU communication and, according to NVIDIA's own explainer, fourth-generation NVLink exceeded PCIe Gen 5 bandwidth by more than 7x.
As of April 26, 2026, NVIDIA's official NVLink page lists sixth-generation NVLink at 3.6 TB/s of bandwidth per GPU for Rubin.
Not by itself. It gives software a much better communication path. The workload and system software still need to know how to use multiple GPUs effectively.
No. The current product conversation is centered on AI, HPC, DGX, HGX, rack-scale inference, and superchip designs rather than consumer gaming.
Primary sources
This page avoids rumor-roundup content. The goal is to make official information readable, not to invent another hype layer.
Current specs
Used for sixth-generation figures, NVL72 total bandwidth, and the current official spec table.
Background explainer
Used for the broad definition, third-generation A100 figure, fourth-generation H100 figure, and the PCIe comparison.
Blackwell launch
Used for fifth-generation NVLink bandwidth, the 576-GPU claim, and the 900 GB/s NVLink-C2C statement.